11.4.10.1 CN Configuration and Operation

The CN pins are configured as follows:

  1. Disable CPU interrupts.
  2. Set the desired CN I/O pin as an input by setting the corresponding TRISx register bits to 1.
    Note: If the I/O pin is shared with an analog peripheral, it may be necessary to configure this pin as a digital input.
  3. Enable the CN Module by setting the ON bit (CNCONx[15]) = 1.
  4. Enable individual CN input pins; enable optional pull-ups or pull-downs.
  5. Clear any pending CN interrupt conditions before enabling interrupts.
  6. Configure the CNx Interrupt Priority bits, CNxIP[2:0].
  7. Clear the CNx Interrupt Flag bit by setting the CNxIF bit (IFSx register) = 0.
  8. Configure the CNx pin interrupt for either Mismatch mode or Edge Detect mode using the CNSTYLE bit (CNCONx[11]):
    • If Mismatch mode (CNSTYLE = 0) is selected, enable the individual CN pins using the CNEN0x bits. The CNEN1x bits are ignored in this mode.
    • If Edge Detect mode (CNSTYLE = 1) is selected, use the CNEN0x bits to enable positive edge detection and the CNEN1x bits to enable negative edge detection.
  9. Enable the CNx Interrupt Enable bit by setting the CNxIE bit (IECx register) = 1.
  10. Enable CPU interrupts.
    In Mismatch mode (CNSTYLE = 0), the CNSTATx registers reflect a live mismatch condition between the current pin state and the value sampled during the last read of the corresponding PORTx register. A mismatch condition is cleared when the PORTx register is read.
    In Edge Detect mode (CNSTYLE = 1), the CNFx registers latch valid edge-detect events on the corresponding pins. CNFx bits must be cleared by software to enable detection of subsequent edge transitions. In this mode, CNSTATx registers are not used and always read as ‘0’.
    In Edge Detect mode, CN interrupts can be configured to occur on rising edges, falling edges, or both, depending on the CNENx configuration. Refer to the Electrical Characteristics section to learn more.
    Note: In Edge Detect mode, clearing the CNxIF interrupt flag without clearing all asserted CNFx bits will cause the CN interrupt to reassert immediately. CNFx bits represent the actual interrupt source.
    Use Mismatch mode (CNSTYLE = 0) when only final pin state changes are of interest and reduced interrupt frequency is desired. Use Edge Detect mode (CNSTYLE = 1) when individual signal transitions must not be missed. When using Edge Detect mode, clear CNFx bits in the ISR and consider enabling only a single edge to limit the interrupt rate.