10.4.3 Interrupt Control Register 3

Name: INTCON3
Offset: 0x78

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
     CPUBETDMABETYRAMBETXRAMBET 
Access R/W/HSR/W/HSR/W/HSR/W/HS 
Reset 0000 

Bit 3 – CPUBET CPU Bus Error Trap Status bit

ValueDescription
1 CPU Bus Error trap has occurred.
0 CPU Bus Error trap has not occurred.

Bit 2 – DMABET DMA Bus Error Trap Status bit

ValueDescription
1 DMA Bus Error trap has occurred.
0 DMA Bus Error trap has not occurred.

Bit 1 – YRAMBET YRAM Bus Error Trap Status bit

ValueDescription
1 YRAM Bus Error trap has occurred.
0 YRAM Bus Error trap has not occurred.

Bit 0 – XRAMBET XRAM Bus Error Trap Status bit

ValueDescription
1 XRAM Bus Error trap has occurred.
0 XRAM Bus Error trap has not occurred.