9.2 Place and Route

To place and route the design, TX_PLL, XCVR_REF_CLK, and PF_XCVR must be configured using the I/O Editor. For On-board transceiver loopback, the following figure shows how the Lane 2 and Lane 3 of Quard 2 are used.

Figure 9-2. I/O Editor Option—XCVR View

On the Design Flow window, double-click Place and Route. When place and route is successful, a green tick mark appears.

Figure 9-3. Place and Route

The following table lists the resource utilization after place and route.

Table 9-2. Resource Utilization—Place and Route
TypeUsedTotalPercentage
4 LUT264712995448.84
DEF160992995445.37
I/O Register05100
Logic Element3184329954410.63