9.1 Synthesis
(Ask a Question)To synthesis the design, perform the following steps:
- On the Design Flow window, double-click Synthesize.
- When the synthesis is successful, a green tick mark appears next to Synthesize. See Figure 9-1.
The following table lists the resource utilization of the CPRI loopback design. These values vary slightly for different Libero runs, settings, and seed values.
| Type | Used | Total | Percentage |
|---|---|---|---|
| 4LUT | 26007 | 299544 | 8.68 |
| DFF | 15993 | 299544 | 5.34 |
| I/O Register | 0 | 1536 | 0 |
| User VO | 11 | 512 | 2.15 |
| Single-ended I/O | 11 | 512 | 2.15 |
| Differential I/O Pairs | 0 | 256 | 0 |
| µSRAM | 12 | 2772 | 0.43 |
| LSRAM | 75 | 952 | 7.88 |
| Math | 0 | 924 | 0 |
| H-Chip Global | 10 | 48 | 20 83 |
| Local Global | 4 | 1008 | 0.4 |
| PLL | 1 | 8 | 12.5 |
| DLL | 0 | 8 | 0 |
| BANKEN | 1 | 7 | 14.29 |
| CRN INT | 1 | 24 | 4.17 |
| UJTAG | 1 | 1 | 100 |
| INIT | 1 | 1 | 100 |
| OSC RC160MHZ | 1 | 1 | 100 |
| Transceiver Lanes | 2 | 16 | 12.5 |
| Transceiver PCIe | 0 | 2 | 0 |
| TX PLL | 1 | 11 | 9.09 |
| XCVR REF CLK | 1 | 11 | 9.09 |
| ICB CLKDIV | 1 | 24 | 4.17 |
| ICB CLKINT | 4 | 72 | 5.56 |
| ICB INT | 1 | 12 | 8.33 |