19.3.2.1 Sleep Modes

In Active mode, the device runs as ordinary with all systems active. In addition to Active mode, there are three different sleep modes with decreasing power consumption and functionality.

Table 19-1. Sleep Modes
Mode	Description	Power Consumption
Active	Normal mode, all systems are active	Highest power consumption
Idle	The CPU stops executing code, resulting in reduced power consumption. All peripherals are running. All interrupt sources can wake the device.
Standby	In this mode, each clock source or peripheral can individually be enabled or disabled using its running in Standby sleep mode, enabled by writing its RUNSTDBY bit to ‘`1`’. The power consumption depends on the number of enabled peripherals and clocks. A subset of interrupt sources can wake the device ⁽¹⁾.
Power-Down	All high-frequency clocks are stopped. Only the WDT and the PIT (component of the RTC) are active, resulting in the lowest power consumption. The only wake-up sources are the pin change interrupt, CCL interrupt (if filter and edge detect are disabled), and TWI address match. A subset of the peripherals are running, and a subset of interrupt sources can wake the device⁽¹⁾.	Lowest power consumption

Note:

Refer to the Sleep Mode Activity tables for further information.

Refer to the Wake-up Time section for information on how the three sleep modes affect the wake-up time.

Table 19-2. Sleep Mode Activity Overview for Peripherals
Peripheral	Active in Sleep Mode
Peripheral	Idle	Standby	Power-Down
CPU
RTC	X	X^(1,2)	X⁽²⁾
WDT	X	X	X
BOD	X	X	X
EVSYS	X	X	X
CCL	X	X⁽¹⁾
AC
ADC
DAC
ZCD
TCA
TCBn
All other peripherals	X

Note:

For the peripheral to run in Standby sleep mode, the RUNSTDBY bit of the corresponding peripheral must be written to ‘1’.
In Standby sleep mode, only the RTC functionality requires the RUNSTDBY bit to be ‘1’. In Power-Down sleep mode, only the PIT functionality is available.

Table 19-3. Sleep Mode Activity Overview for Clock Sources
Clock Source	Active in Sleep Mode
Clock Source	Idle	Standby	Power-Down
Main clock source	X	X⁽¹⁾
RTC clock source	X	X^(1,2)	X⁽²⁾
WDT oscillator	X	X	X
BOD oscillator⁽³⁾	X	X	X
CCL clock source	X	X⁽¹⁾
TCD clock source	X

Note:

For the clock source to run in Standby sleep mode, the RUNSTDBY bit of the corresponding peripheral must be written to ‘1’.
In Standby sleep mode, only the RTC functionality requires the RUNSTDBY bit to be ‘1’. In Power-Down sleep mode, only the PIT functionality is available.
The Sampled mode only.

Table 19-4. Sleep Mode Wake-up Sources
Wake-Up Sources	Active in Sleep Mode
Wake-Up Sources	Idle	Standby	Power-Down
PORT Pin interrupt	X	X	X⁽¹⁾
BOD VLM interrupt	X	X	X
MVIO interrupts	X	X	X
RTC interrupts	X	X^(2,3)	X⁽³⁾
TWI Address Match interrupt	X	X	X
Periodic Interrupt	X	X	X⁽³⁾
CCL interrupts	X	X⁽¹⁾	X⁽⁴⁾
USART Start-Of-Frame interrupt	X	X⁽²⁾
TCA interrupts
TCBn interrupts
ADC interrupts
AC interrupts
ZCD interrupts
All other interrupts	X

Note:

The I/O pin must be configured according to the Asynchronous Sensing Pin Properties section in the PORT - I/O Pin Configuration section.
For the peripheral to run in Standby sleep mode, the RUNSTDBY bit of the corresponding peripheral must be written to ‘1’.
In Standby sleep mode, only the RTC functionality requires the RUNSTDBY bit to be ‘1’. In Power-Down sleep mode, only the PIT functionality is available.
CCL will only wake the device if the path through LUTn is asynchronous (FILTSEL = 0x0 and EDGEDET = 0x0 in the CCL.LUTnCTRLA register).