23.4.2.4.8 Output Polarity
The Channel Polarity n bit field in the Waveform register (WAVE.POLn) is available in all waveform output generation modes. In single-slope and dual-slope PWM operation, it is possible to invert the pulse edge alignment individually on start or end of a PWM cycle for each compare channels. The following table shows the waveform output set/clear conditions, depending on the settings of timer/counter, direction, and polarity.
| Waveform Generation operation | DIR | POLn | Waveform Generation Output Update | |
|---|---|---|---|---|
| Set | Clear | |||
| Single-Slope PWM | 0 | 0 | Timer/counter matches TOP | Timer/counter matches CCn |
| 1 | Timer/counter matches CC | Timer/counter matches TOP | ||
| 1 | 0 | Timer/counter matches CC | Timer/counter matches ZERO | |
| 1 | Timer/counter matches ZERO | Timer/counter matches CC | ||
| Dual-Slope PWM | – | 0 | Timer/counter matches CC when counting up | Timer/counter matches CC when counting down |
| 1 | Timer/counter matches CC when counting down | Timer/counter matches CC when counting up | ||
In Normal and Match Frequency, the value of WAVE.POLn represents the initial state of the waveform output.