37.9.1 Maximum Clock Frequencies Electrical Specifications
| Standard
operating conditions: VDDIO = AVDD = 1.8V to 5.5V (Unless
otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | ||||
|---|---|---|---|---|
| Param. No. | Symbol | Characteristics | Max | Units |
| FCLK_1 | fCY | MCU clock frequency | 24 | MHz |
| FCLK_3 | fAHB | AHB clock frequency | 24 | MHz |
| FCLK_5 | fAPBn | APBA, APBB, APBC, APBD clock frequency | 24 | MHz |
| FCLK_13 | fGCLK_EIC | EIC input clock frequency | 24 | MHz |
| FCLK_19 | fGCLK_EVSYS_CHANNELn | EVSYS channel n input clock frequency | 24 | MHz |
| FCLK_21 | fGCLK_SERCOMn_SLOW | Common SERCOM slow input clock frequency | 24 | MHz |
| FCLK_23 | fGCLK_SERCOMn_CORE | SERCOMn input clock frequency | 24 | MHz |
| FCLK_35 | fGCLK_TCCn | TCCn input clock frequency | 24 | MHz |
| FCLK_37 | fGCLK_TCn | TC0, TC1, TC2, TC3 input clock frequency | 24 | MHz |
| FCLK_43 | fGCLK_CCL | CCL input clock frequency | 24 | MHz |
| FCLK_45 | fGCLK_GCLKINn | External GCLKn input clock frequency | 24 | MHz |
| FCLK_46 | fGCLK_GCLKOUTn | External GCLKn output clock frequency | 1/(Max(tRISE, tFALL) x π | MHz |
| FCLK_49 | fGCLK_AC | Analog comparator peripheral module clock frequency | 24 | MHz |
| FCLK_51 | fGCLK_ADCn | ADCn input clock frequency | 24 | MHz |
| FCLK_55 | fGCLK_PTC | PTC input clock frequency | 24 | MHz |
| FCLK_63 | fGCLK_PTC | PTC (Peripheral Touch Controller), input clock frequency | 24 | MHz |
| FCLK_67 | fGCLK_SPI | SERCOM SPI internal GCLK frequency | 24 | MHz |
| FCLK_69 | fGCLK_I2C | SERCOM I2C internal GCLK frequency | 24 | MHz |
| FCLK_71 | fGCLK_USART | SERCOM USART internal GCLK freq (Asynchronous mode) | 24 | MHz |
| SERCOM USART internal GCLK freq (Synchronous mode) | 24 | MHz | ||