16.1 Device-Specific Information

Table 16-1. PWM Summary Table
PWM Module Instances	Number of PWM Events	Combinatorial PWM Logic	Outputs per Instance	Peripheral Bus Speed	Clock Generator
8	6	6	2	Normal (1:2 of CPU clock)	Clock Generator 5

Table 16-2. Auxiliary PWM Summary Table
PWM Module Instances	Number of PWM Events	Combinatorial PWM Logic	Outputs per Instance	Peripheral Bus Speed	Clock Generator
4	4	4	2	Normal (1:2 of CPU clock)	Clock Generator 5

Table 16-3. MCLKSEL PWM Master Clock Selection
Value	Description
`1`	Clock Generator 5
`0`	Normal (1:2 of CPU clock)

Table 16-4. PCI Source Selection (PSS)
PSS bits in PGxyPCI2 registers	Description
`31`	CLC1 output
`30`	Comparator 3 output
`29`	Comparator 2 output
`28`	Comparator 1 output
`27`	APWM event B
`26`	APWM event A
`25`	PWM event C
`24`	PWM event B
`23`	PWM event A
`22`	RPn Input PCI22R
`21`	RPn Input PCI21R
`20`	RPn Input PCI20R
`19`	RPn Input PCI19R
`18`	RPn Input PCI18R
`17`	RPn Input PCI17R
`16`	RPn Input PCI16R
`15`	RPn Input PCI15R
`14`	RPn Input PCI14R
`13`	RPn Input PCI13R
`12`	RPn Input PCI12R
`11`	RPn Input PCI11R
`10`	RPn Input PCI10R
`9`	RPn Input PCI9R
`8`	RPn Input PCI8R
`7-4`	Reserved
`3`	Internally connected to Combo Trigger B
`2`	Internally connected to Combo Trigger A
`1`	Internally connected to the output of PWMPCI[2:0] bits in PGxEVT1 registers
`0`	Tied to ‘0’