34.4.5 Input Offset Trim

It is possible to override factory calibration values and perform user calibration for input referred voltage offset errors. The AMPxCON2 register is used for input offset which allows an adjustment to be added or subtracted from the factory offset trim value.

The Op Amp has High and Low-Bandwidth/Power Operating modes. The user can trim the input offset error for one or both modes, depending on the application. The complementary P and N channel differential pairs on the input allow full rail-to-rail input voltages to be applied to the amplifier inputs. Each differential pair should be trimmed independently to avoid interactions during the calibration procedure. Therefore, there are four sets of trim adjustment bit fields to account for the two input differential pairs and two power modes described above:

  • NOFFSETLP[4:0]
  • POFFSETLP[4:0]
  • NOFFSETHP[4:0]
  • POFFSETHP[4:0]

The procedure for calibrating the input offset error assumes that the Op Amp can be connected as a unity gain buffer temporarily for calibration to an external voltage. By measuring Op Amp buffer's input and output voltages with the ADC, the offset can be measured as the difference between readings, and driven towards zero while adjusting the Op Amp offset register. Each of the Op Amp pins are connected to the same ADC core, so ADC gain and offset errors are canceled out. Applications which require a fixed Op Amp topology (for example, an amplifier which drives some critical external signal) will not be able to use this method.

  1. Configure the Op Amp for Unity Gain mode using the internal feedback connection.
  2. Connect the non-inverting input of the Op Amp to a mid-scale voltage reference of VDD/2.
  3. Select either High-Power (high-bandwidth) or Low-Power (low-bandwidth) Operational mode.
  4. Disable the P channel differential input pair and enable the N-channel differential pair.
  5. Subtract the input voltage measurement from the output voltage measurement value to determine the amount of offset error.
  6. Raise or lower the value in the NOFFSETxx register and repeat steps 5 and 6 until the offset error is nulled out.
  7. Enable the P channel differential pair of the op amp and disable the N channel differential pair.
  8. Repeat steps 5 and 6 and adjust the POFFSETxx register to null out the offset error.
  9. Change the Op Amp Power mode (step 3) and repeat steps 4 through 9 to trim the Op Amp offset voltage in the second Power mode, using the appropriate POFFSETxx and NOFFSETxx trim registers.
  10. Enable both the P channel and N channel differential pair to return the Op Amp to normal operation with full input voltage range.
  11. Save the values of the POFFSETxx and NOFFSETxx SFRs in non-volatile memory for later retrieval and use by the application.