WRERR Error Flag Bit

When a program or erase operation is initiated using the NVMCON.WR bit, the NVMCON.WRERR bit will indicate if the operation was properly completed. The user may check the state of the WRERR bit at any time after WR is set. Typically, the application will wait for WR to be cleared (indicating the program or erase sequence has completed), then check WRERR to confirm if the sequence completed successfully or not.

If WRERR = 0 at that time, the operation was completed successfully. If WRERR = 1 at that time, the operation did not complete successfully. The WRERR bit is cleared on a cold Reset and should be cleared by firmware before initiating a program/erase operation.

WREC Bit

The WREC field indicates the error type when the WRERR bit is set. Program/erase operation errors include:

  • Row programming not completed due to a warm Reset
  • System bus error during a row program operation
  • Error reported by Flash panel control logic
  • Security access control violation
  • Invalid program/erase operation (PROGOP)
Note: WREC is cleared on a cold Reset and when WRERR = 0 .

WRRE Bit

The WRRE bit indicates if there was a warm Reset (Implications of Device Reset) request during a program/erase operation.

The PROGOP, WRERR, WREC and WRRE fields are not cleared on a warm Reset. This provides the error status for a program/erase operation initiated before a warm Reset.