7.3.3.1.2 Implications of Device Reset

Cold Reset

A loss of power (Cold Reset) during a program/erase immediately terminates the operation. In this case, the targeted Flash may be partially programmed/erased and reads of the affected Flash may return invalid data or generate ECC errors. There is no status register indication that a program or erase was terminated by a Cold Reset. This needs to be determined based on the state of Flash. The NVM Controller CRC function can be used to evaluate the integrity of Flash after a Cold Reset.

Warm Reset

If a Warm Reset request occurs during a word program or page erase operation, the operation continues with the rest of the device held in Reset until the operation completes. The row programming operation cannot be completed due to its use of the RAM, which is not accessible in Reset. The WRRE bit is set when a Warm Reset request occurs during a program/erase operation.

The Fault injection capability of the ECC is a feature intended for use only at run time. It is not possible to inject errors when the Flash based fuses are read (i.e., during the Reset sequence). Should a Reset (other than BOR or POR) occur during a Fault injection write, the write will be allowed to complete just like any other Flash write. Should the Reset be due to a BOR or POR, the write will have been aborted because power was removed from the panel. Flash Controller and ECC Fault injection registers related to Flash writes are subject only to POR. Unless the Reset was a POR, the user may check the state of NVMCON.WRERR to determine if a write had failed prior to Reset.