36.8.4 SLCDC Display Register
This register can only be written if the WPEN bit is cleared in the SLCDC Write Protection Mode Register.
| Name: | SLCDC_DR |
| Offset: | 0xC |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| LCDBLKFREQ[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DISPMODE[2:0] | |||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 15:8 – LCDBLKFREQ[7:0] LCD Blinking Frequency Selection
Processed at beginning of next frame.
Blinking frequency = Frame Frequency/LCDBLKFREQ[7:0].
0 written in LCDBLKFREQ stops blinking.
Bits 2:0 – DISPMODE[2:0] Display Mode Register
Processed at beginning of next frame.
| Value | Name | Description |
|---|---|---|
| 0 | NORMAL | Normal Mode—Latched data are displayed. |
| 1 | FORCE_OFF | Force Off Mode—All pixels are invisible. (The SLCDC memory is unchanged.) |
| 2 | FORCE_ON | Force On Mode—All pixels are visible. (The SLCDC memory is unchanged.) |
| 3 | BLINKING | Blinking Mode—All pixels are alternately turned off to the predefined state in SLCDC memory at LCDBLKFREQ frequency. (The SLCDC memory is unchanged.) |
| 4 | INVERTED | Inverted Mode—All pixels are set in the inverted state as defined in SLCDC memory. (The SLCDC memory is unchanged.) |
| 5 | INVERTED_BLINK | Inverted Blinking Mode—All pixels are alternately turned off to the predefined opposite state in SLCDC memory at LCDBLKFREQ frequency. (The SLCDC memory is unchanged.) |
| 6 | USER_BUFFER_LOAD | User Buffer Only Load Mode—Blocks the automatic transfer from User Buffer to Display Buffer. |
| 7 | BUFFERS_SWAP | Buffer Swap Mode—All pixels are alternatively assigned to the state defined in the User Buffer, then to the state defined in the Display Buffer at LCDBLKFREQ frequency. |