47.7.3.3 Peripheral Selection
The serial peripherals are selected through the assertion of the NPCS0 to NPCS3 signals. By default, all NPCS signals are high before and after each transfer.
- Fixed Peripheral Select Mode: MCSPI exchanges data with only one peripheral. Fixed Peripheral Select mode is enabled by clearing MCSPI_MR.PS. In this case, the current peripheral is defined by MCSPI_MR.PCS. MCSPI_TDR.PCS has no effect.
- Variable Peripheral Select Mode: Data can be exchanged with more than
one peripheral without having to reprogram MCSPI_MR.PCS.
Variable Peripheral Select mode
is enabled by setting MCSPI_MR.PS. MCSPI_TDR.PCS is used to select the current
peripheral. This means that the peripheral selection can be defined for each new data.
The value must be written in a single access to MCSPI_TDR in the following format:
[xxxxxxx(7-bit) + LASTXFER(1-bit)1+ xxxx(4-bit) + PCS (4-bit) + TD (8- to 16-bit data)]
with LASTXFER (Last Transfer) at 0 or 1 depending on the Chip Select Active After Transfer (CSAAT) bit, and PCS (Peripheral Chip Select) equal to the chip select to assert, as defined in MCSPI_TDR.
Note:- Optional
For details on CSAAT, LASTXFER and CSNAAT, see Peripheral Deselection with PDC.
If LASTXFER is used, the command must be issued after writing the last character. Instead of LASTXFER, the user can use the SPIDIS command. After the end of the PDC transfer, it is necessary to wait for the TXEMPTY flag and then write SPIDIS into the MCSPI Control register (MCSPI_CR). This does not change the configuration register values. The NPCS is disabled after the last character transfer. Then, another PDC transfer can be started if the MCSPI Enable (SPIEN) bit in MCSPI_CR was previously written.
