47.8.16 MCSPI CRC Register

This register can only be written if the WPEN bit is cleared in the MCSPI Write Protection Mode Register.

Name: MCSPI_CRCR
Offset: 0x4C
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
       FHECRM 
Access R/WR/W 
Reset 00 
Bit 2322212019181716 
 FRHL[3:0]   CRCS 
Access R/WR/WR/WR/WR/W 
Reset 00000 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 FRL[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 25 – FHE Frame Header Excluded

ValueDescription
0

The frame header is included in the CRC calculation.

1

The frame header is excluded from the CRC calculation.

Bit 24 – CRM Continuous Read Mode

ValueDescription
0

A header is sent every frame in case of contiguous frames (without de-asserting the corresponding NPCS).

1

A header is sent only on the first frame in case of contiguous frames (without de-asserting the corresponding NPCS).

Bits 23:20 – FRHL[3:0] Frame Header Length

If MCSPI_MR.TPMEN= 0, this value is the length of the frame header, in bytes.

If MCSPI_MR.TPMEN= 1, this value is the length of the frame header minus 1, in bytes.

Bit 16 – CRCS CRC Size

ValueNameDescription
0 16B_CRC

CRC size is 16 bits.

1 32B_CRC

CRC size is 32 bits.

Bits 7:0 – FRL[7:0] Frame Length

If MCSPI_MR.TPMEN= 0, this value is the length of the frame (header and CRC included), in bytes.

If MCSPI_MR.TPMEN= 1, this value is the length in bytes of the frame starting from the SYNC field (included) with CRC included.