5.7 PCB Recommendations

The routing board signals from FPGA to QDR II+ or QDR II+ Extreme devices, adhere to the constraints mentioned in the following tables.

Table 5-8. Maximum Length and Delay Constraints
SignalMaximum Length (inches)Routing Delay (ns)
Address and Command6.01
Data6.01
Table 5-9. Skew Constraints
SignalSkew Constraints
Data to Clock

(D to K and Q to CQP)

±25 ps
Data Bus (D or Q)±25 ps
Address and Command±25 ps
Address, Command and to Clock (KP)±25 ps
KP to KN±10 ps