Multi-Pin Configuration
For faster configuration of the port module, the multi-pin configuration write enables the configuration of several pins of a port in a single cycle. Especially with large pin count devices, this function can significantly speed up PORT pin configuration operations.
Writing to this register may be followed by a write to either of the Multi-Pin Control (PORTx.PINCTRLUPD/SET/CLR) registers to update the Pin n Control (PORTx.PINnCTRL) registers for PORTx.
This register is mirrored across all PORTx modules.
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
INVEN | INLVL | PULLUPEN | ISC[2:0] | ||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | ||
Reset0 | 0 | 0 | 0 | 0 | 0 |
Inverted I/O Enable
Value | Description |
---|---|
0 | Input and output values are not inverted |
1 | Input and output values are inverted |
Input Level Select
Value | Name | Description |
---|---|---|
0 | ST | Schmitt Trigger derived from supply level |
1 | TTL | TTL Levels |
Pull-up Enable
Value | Description |
---|---|
0 | Pull-up disabled |
1 | Pull-up enabled |
Input/Sense Configuration
This bit field controls the input and sense configuration of pin n. The sense configuration determines how a port interrupt can be triggered.
Value | Name | Description |
---|---|---|
0x0 | INTDISABLE | Interrupt disabled but digital input buffer enabled |
0x1 | BOTHEDGES | Interrupt enabled with sense on both edges |
0x2 | RISING | Interrupt enabled with sense on rising edge |
0x3 | FALLING | Interrupt enabled with sense on falling edge |
0x4 | INPUT_DISABLE | Interrupt and digital input buffer disabled(1) |
0x5 | LEVEL | Interrupt enabled with sense on low level |
other | — | Reserved |