Power Sequencing

The system supports the following power ramp scenarios for MVIO when configured in Dual-Supply mode:

• Supply ramp of V_DDIO before V_DDIO2
• Supply ramp of V_DDIO2 before V_DDIO
• V_DDIO2 loses and regains power
• V_DDIO loses and regains power

When either voltage domain loses power, the MVIO I/O pins are tri-stated. If V_DDIO2 regains power, the pins will reload the current configuration of the PORT registers. If V_DDIO loses power, the device will reset, and the PORTs will have to be reinitialized. Refer to the Electrical Characteristics section for V_DD and V_DDIO2 power supply thresholds.