I/O Pin Characteristics

Table 1. I/O Pin Characteristics⁽¹⁾
Symbol	Description	Min.	Typ.	Max.	Units	Conditions
Input Low Voltage
V_IL	I/O PORT:
	With Schmitt Trigger buffer	—	—	0.2×V_DD	V
	With I²C levels	—	—	0.3×V_DD	V
	With SMBus 3.0 levels	—	—	0.8	V
	RESET Pin	—	—	0.2×V_DD	V
	TTL level	—	—	0.8	V
Input High Voltage
V_IH	I/O PORT:
	With Schmitt Trigger buffer	0.8×V_DD	—	—	V
	With I²C levels	0.7×V_DD	—	—	V
	With SMBus 3.0 levels	1.35	—	—	V
	RESET Pin	0.8×V_DD	—	—	V
	TTL level	1.6	—	—	V
Input Leakage Current⁽²⁾
I_IL	I/O PORTS⁽³⁾	—	<5	—	nA	GND ≤ V_PIN ≤ V_DD, pin at high-impedance, 85°C
	I/O PORTS⁽³⁾	—	<5	—	nA	GND ≤ V_PIN⁽⁵⁾ ≤ V_DD, pin at high-impedance, 125°C
	RESET Pin⁽⁴⁾	—	±50	—	nA	GND ≤ V_PIN ≤ V_DD, pin at high-impedance, 85°C
Pull-up Current
I_PUR		—	140	—	μA	V_DD = 3.0V, V_PIN = GND
Output Low Voltage
V_OL	Standard I/O Ports	—	—	0.6	V	I_OL = 10 mA, V_DD = 3.0V
Output High Voltage
V_OH	Standard I/O Ports	V_DD-0.7	—	—	V	I_OH = 6 mA, V_DD = 3.0V
Pin Capacitance
C_IO	Op amp output	—	9	—	pF
	V_REFpin	—	7	—	pF
	XTAL pins	—	4	—	pF
	Other pins	—	4	—	pF
Notes: 1.These figures are valid for all I/O ports regardless of if they are connected to the V_DD or V_DDIO2 power domain. 2.The negative current is defined as current sourced by the pin. 3.The leakage current numbers for I/O PORTS are valid also when the pin is used as an input to an enabled analog peripheral. 4.The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 5.A requirement for all I/O pins.