The following definitions are used throughout the documentation:

Table 1. Timer/Counter Definitions
Name Description
BOTTOM The counter reaches BOTTOM when it becomes 0x0000
MAX The counter reaches MAXimum when it becomes all ones
TOP The counter reaches TOP when it becomes equal to the highest value in the count sequence
UPDATE The update condition is met when the timer/counter reaches BOTTOM or TOP, depending on the Waveform Generator mode. Buffered registers with valid buffer values will be updated unless the Lock Update (LUPD) bit in the TCAn.CTRLE register has been set.
CNT Counter register value
CMP Compare register value
PER Period register value

In general, the term timer is used when the timer/counter is counting periodic clock ticks. The term counter is used when the input signal has sporadic or irregular ticks. The latter can be the case when counting events.