CORE10GMAC0 (IAP Initiator)

The Core10GMAC IP is configured for 10GBASE-R mode with a core data width of 64 bits. Core data width is the width of the data path connected to the transceiver interface. The system data width, that is, the width of the interface to the user logic, is configured as 64 bits. The Tx and Rx Pause features are disabled, and both the MAC TX FIFO depth and MAC RX FIFO depth are set to 256.

The CORE10GMAC IP is configured as shown in the following figure.
Figure 1. CORE10GMAC Configuration