17.5.3.1 System Address Regions

The system address regions add the capability to define up to four disjoint memory regions mapping to the DRAM as consecutive addresses.

Each region is defined by:

• Base Address: starting address of the region aligned to the minimum block size.
• Number of Blocks: size of the region in multiples of minimum block size.

The base address of each region is specified by the register SARBASEn.base_addr and the total number of blocks is specified by the register SARSIZEn.nblocks (see Register Descriptions).

System address region specification is the same for all ports. Error response is not generated by the controller for addresses falling outside the specified address regions and the same address translation is applied from one base address to the next base address.

The base addresses must be specified such that they are in the ascending order (SARBASE0 < SARBASE1 < SARBASE2 < SARBASE3) and such that regions do not overlap.