17.5.2 Port Arbiter (PA)

The Port Arbiter block arbitrates command requests from the AXI ports to the HIF of the DDR Controller (DDRC). PA is comprised of multiple tiers of arbitration stages which include:

• Read/write arbitration
• 2-priority level arbitration based on port aging and expired-VPR/expired-VPW commands (timeout-priority0)
• 2-priority level arbitration for read requests based on DDRC read priorities
• 32-priority level arbitration based on internal port aging or 16-priority level arbitration based external AXI QoS inputs
• Round-robin arbitration to resolve ports having the same priority after passing all stages of arbitration