12.2.1 AMIB Bus Matrix Issuing Functionality Modification Register

This register is only present if the block is connected directly to a switch. This register sets the issuing capability of the preceding switch arbitration scheme to 1.
Name: NICGPV_AMIB_FN_MOD_BM_ISSx
Offset: 0x2008 + x*0x1000 [x=0..14]
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
       WRITE_ISS_OVERRIDEREAD_ISS_OVERRIDE 
Access R/WR/W 
Reset 00 

Bit 1 – WRITE_ISS_OVERRIDE Write Issuing Override

ValueDescription
0 No effect.
1 Write issuing capability is limited to one outstanding transaction.

Bit 0 – READ_ISS_OVERRIDE Read Issuing Override

ValueDescription
0 No effect.
1 Read issuing capability is limited to one outstanding transaction.