12.2.7 ASIB Write Address Channel Peak Rate Register

This register is used to program a binary fraction of the peak number of transfers per cycle.
Name: NICGPV_ASIB_AW_Px
Offset: 0x042118 + x*0x1000 [x=0..10]
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 AW_P[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
          
Access  
Reset  

Bits 31:24 – AW_P[7:0] AW Channel Peak Rate