17.5.12.2 Mode Register Read

MRR transactions should only be performed to one rank at a time, to avoid bus contention. When an MRR is performed, the Mode register contents are available on hif_mrr_data, qualified by hif_mrr_data_valid, after the Mode register read command is issued by the UDDRC to the SDRAM. Note that the entire width of the SDRAM data is mapped to hif_mrr_data. You must select the appropriate byte, depending on whether the bytes are swapped on the board or not.