17.5.14.5 Registers Related to Power-Saving Features

The following registers are related to the power saving features:

• UDDRC_DRAMTMG5.t_cke
• Precharge power-down controls:
  • UDDRC_PWRCTL.POWERDOWN_EN
  • UDDRC_PWRTMG.POWERDOWN_TO_X32
  • UDDRC_DRAMTMG1.T_XP
• Self-refresh controls:
  • UDDRC_PWRCTL.SELFREF_SW
  • UDDRC_PWRCTL.SELFREF_EN
• Deep power-down controls:
  • UDDRC_PWRCTL.DEEPPOWERDOWN_EN
  • UDDRC_PWRTMG.T_DPD_X4096
• Assertion of dfi_dram_clk_disable to disable the clocks to the DRAM controls:
  • UDDRC_WRCTL.EN_DFI_DRAM_CLK_DISABLE
  • UDDRC_DFITMG1.DFI_T_DRAM_CLK_DISABLE
  • UDDRC_DFITMG1.DFI_T_DRAM_CLK_ENABLE
  • UDDRC_DRAMTMG5.T_CKSRE
  • UDDRC_DRAMTMG5.T_CKSRX
  • UDDRC_DRAMTMG6.T_CKPDE
  • UDDRC_DRAMTMG6.T_CKPDX
  • UDDRC_DRAMTMG6.T_CKDPDE
  • UDDRC_DRAMTMG6.T_CKDPDX
  • UDDRC_DRAMTMG6.T_CKCSX

For more information about these registers, see Register Descriptions.