18.3.6 UARTx Timing Parameter A Register

Note:

The WIP bit is relevant when the UART clock differs from the CPU clock. This bit indicates whether the UART and CPU clocks are synchronized for writes to the parameter registers.
To write to P2 without affecting P1, use UxPAbits.P2 = value. Writing to the entire UxPA register overwrites P1, potentially causes unexpected behavior in LIN and Address Detect modes. When accessing through pointers, ensure a 16-bit pointer targeting P2's base address for writing.

Table 18-8. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Gray cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
C	Write to clear	S	Software settable bit	x	Channel number

Name:	UxPA
Offset:	0x1714, 0x1754, 0x1794

Bit 31 – WIP UxPA Write in Progress bit⁽¹⁾

Value	Description
`1`	Write still in progress (user should not update the UxPA register)
`0`	No write in progress (user can update the UxPA register)

DMX RX:

The First Byte Number to Receive – 1, not including start code (bits[8:0]).

LIN Responder TX:

Number of bytes to transmit (bits[7:0]).

Asynchronous RX with Address Detect:

ADDR to match (bits[7:0]).

Smart Card Mode:

Block Time Counter (BTC) bits. This counter is operated on the bit clock whose period is always equal to one ETU (bits[8:0]).

Other Modes:

Not used

DMX TX:

Number of bytes to transmit – 1 (not including Start code).

LIN Commander TX:

PID to transmit (bits[5:0]).

Asynchronous TX with Address Detect:

Address to transmit. A ‘1’ is automatically inserted into bit 8 (bits[7:0]).

Smart Card Mode:

Guard Time Counter bits. This counter is operated on the bit clock whose period is always equal to one ETU (bits[8:0]).

Other Modes:

Not used.