18.3.10 UARTx Interrupt Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Gray cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| C | Write to clear | S | Software settable bit | x | Channel number |
| Name: | UxUIR |
| Offset: | 0x1724, 0x1764, 0x17A4 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WUIF | ABDIF | ABDIE | |||||||
| Access | R/W/HS | R/W/HS | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bit 7 – WUIF Wake-up Interrupt Flag bit
After the occurrence of the WAKE event, the WUIF flag can only be cleared once the wake (WUE) bit is cleared by hardware following the rising edge.
| Value | Description |
|---|---|
1 |
Sets when WUE = |
0 |
WUE is not enabled or WUE is enabled, but no wake-up event has occurred |
Bit 6 – ABDIF Auto-Baud Completed Interrupt Flag bit
| Value | Description |
|---|---|
1 |
Sets when ABD sequence makes the final 1-to-0 transition; triggers event interrupt (must be cleared by software) |
0 |
ABDEN is not enabled or ABDEN is enabled but auto-baud has not completed |
Bit 2 – ABDIE Auto-Baud Completed Interrupt Enable Flag bit
| Value | Description |
|---|---|
1 |
Allows ABDIF to set an event interrupt |
0 |
ABDIF does not set an event interrupt |