13.6.1.2 DMA Halfway Point Interrupt

The HALF interrupt flag (DMAxSTAT[4]) is an optional interrupt that indicates that the DMAxCNT register is at the halfway point between its original programmed value and 0000h. This can be used with the DONE interrupt to monitor the progress of the DMA transfer.

When enabled, HALF is set only when DMAxCNT reaches the halfway mark, but not thereafter. This results in a non-persistent interrupt. In Repeated modes, the DMA Controller attempts to set HALF every time DMAxCNT reaches the halfway point, whether or not the bit has been cleared. It is the user’s responsibility to clear the bit after it has been set.

The HALFEN bit (DMAxCH[1]) enables the halfway point interrupt. If HALFEN is not set, then the interrupt will not be generated.