13.6.1.1 DMA Completion Interrupt

The DONE bit (DMAxSTAT[5]) indicates the completion status of the last DMA operation. It is automatically set when DMAxCNT decrements to 0000h during a One-Shot or Continuous DMA transaction. When the DONE bit gets set, an interrupt is generated, indicating the DMA transfer completion.

By also examining the corresponding CHEN bit (DMAxCH[0]), it is possible to gain additional information on the status of the previous and current transactions. The possible interpretations are shown in Table 13-24.

Note that DONE remains cleared (= 0) when any Repeated Transfer modes are being used. This is because the address registers and transaction counters automatically reload, and the transaction automatically repeats when DMAxCNT decrements to 0000h. Repeated mode transfers must be terminated in software by clearing the CHEN bit.

The DONEEN bit (DMAxCH[3]) enables the DMA completion interrupt. When DONEEN is not set, the interrupt will not be generated.