17.4.10 Position Comparator

The 32-bit Compare registers (QEIxGEC and QEIxLEC) and associated comparator allow the user application to compare the contents of the Position Counter to a specified value. The comparator provides two outputs: greater than and less than. When a suitable condition is met, the comparator generates and sets the PCHEQIRQ or PCLEQIRQ bit in the QEIx Status register (QEIxSTAT[13] and QEIxSTAT[11], respectively). If the interrupt enable bit, PCHEQIEN or PCLEQIEN, is set, an interrupt is generated. The comparator output is available on the CNTCMPx pin. The selection of a condition is made by the OUTFNC[1:0] bits of the QEIx I/O Control register (QEIxIOC[10:9]). The comparator can also be used to reset the Position Counter when a match is detected. The selection is made by the PIMOD[2:0] bits of the QEIx Control register (QEIxCON[12:10]). Figure 17-8 illustrates the Index Reset Position Counter operation.

Figure 17-8. Index Reset Position Counter Operation
Note:
  1. Position count update shown is when CCM[1:0] = 00.
  2. Position Counter (POSxCNT) contents are incremented and decremented at each new count state although it is not shown in this diagram.