22.3.5.3 Line Delay Compensation

Due to various cable lengths expected in BiSS applications, automatic line delay compensation has been included as part of the BiSS engine. Automatic line delay compensation can be calculated as the difference in time from when the client first receives a Clock signal from the host to the time when the host first receives an Acknowledge from the client (see Figure 22-13). The included INIT bit within the BiINSTR register not only resets status registers, but also initiates the line delay compensation by initializing the channel. The INIT bit can be used and then read from the BiSCDATA0L register to read the detected delay value. To see the behavior of the INIT sequence, see Figure 22-14.