4.4.3 Write Buffers

As the targets can operate on slower clock sources than the initiators, the BMX requires that targets have the ability to buffer writes. The target is then responsible for completing the write. Posting the write improves performance since the write completes sooner from the perspective of the CPU.

Posting writes improves single write performance only. Back-to-back writes can cause stalls to initiators if the clocking for the target is not set to a 1:1 ratio. Write buffers are only one deep, so repeated writes will be held by the BMX until the buffer is empty and the previous write completes. All transactions to a target complete in order, therefore reads are never allowed to pass writes.