25.4.1 Reset

When the ON bit is written to ‘0’, the output of all state logic functions will be reset to ‘0’. A system Reset returns the CLCxCON, CLCxSEL and CLCxGLS registers to the default state and disables the module.

Asserting a device reset returns all bits in the module registers to the default state. The output of all logic functions is ‘0’ after a reset; this includes both latch and flip-flop functions. When a device reset is asserted, ON (CLCxCON[15]) = 0, the state logic is reset and the output of the logic function is forced low.