4.7.3 FEEN2 – RF Front-End Enable Register 2
| Name: | FEEN2 |
| Offset: | 0x102 |
| Reset: | 0x00 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | XTPEN | PLPEN | TMPM | | SDTX | SDRX | |
| Access | R | R | R/W | R/W | R/W | R | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – Reserved Bit
This bit is reserved and read as ‘0’.
Bit 6 – Reserved Bit
This bit is reserved and read as ‘0’.
Bit 5 – XTPEN XTO Voltage Pump Enable
This bit must be written to ‘1’ if the SPDT RF switch is to be used.
Bit 4 – PLPEN PLL Post Enable
This bit is set 10 μs after the PLL is enabled in FEEN1.PLEN.
Bit 3 – TMPM Temperature Measurement
If this bit is written to ‘1’, the temperature measurement is activated. This bit has to be set between FEEN1.ADEN = 1 and FEEN1.ADCLK = 1.
Bit 2 – Reserved Bit
This bit is reserved and read as ‘0’.
Bit 1 – SDTX Single Pole Double Throw (SPDT) RF Switch RX2
If this bit is written to ‘1’, the antenna port of the SPDT (pin 4/SPDT_ANT) is switched to RX2 port (pin 6/SPDT_RX2).
Bit 0 – SDRX Single Pole Double Throw (SPDT) RF Switch RX
If this bit is written to ‘1’, the antenna port of the SPDT (pin 4/SPDT_ANT) is switched to RX port (pin 3/SPDT_RX).
