4.9.11.7 Reading Lock Bits by Firmware

Lock bit values are returned in the destination register after an LPM instruction was issued within three CPU cycles after the BLBSET and SELFPRGEN bits were set in SPMCSR. The BLBSET and SELFPRGEN bits automatically clear upon completion of reading the lock bits if no LPM instruction is executed within three CPU cycles or if no SPM instruction is executed within four CPU cycles. When BLBSET and SELFPRGEN are cleared, LPM functions normally.

To read the lock bits, follow the procedure below:

1. Load the Z pointer with 0x0001.
2. Set BLBSET and SELFPRGEN bits in SPMCSR.
3. Issue an LPM instruction within three clock cycles.
4. Read the lock bits from the LPM destination register.

If successful, the contents of the destination register is as follows.

See Program and Data Memory Lock Bits from Related Links.