33.7.14 Period Value, 8-bit Mode
Note: This register is write-synchronized: SYNCBUSY.PER must be checked to ensure the PER
register synchronization is complete.
| Name: | PER |
| Offset: | 0x1B |
| Reset: | 0xFF |
| Property: | Write-Synchronized |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PER[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bits 7:0 – PER[7:0] Period Value
These bits hold the value of the TC period count.
Note: Updates to the PER register are not possible with the DMA while in Standby
mode.