17.14.2 Timer/Counter0 Control Register B
| Name: | TCCR0B |
| Offset: | 0x2D |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ICNC0 | ICES0 | WGM03 | WGM02 | CS0[2:0] | |||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bit 7 – ICNC0 Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is activated, the input from the Input Capture pin (ICP0) is filtered. The filter function requires four successive equal valued samples of the ICP0 pin for changing its output. The Input Capture is therefore delayed by four Oscillator cycles when the noise canceler is enabled.
Bit 6 – ICES0 Input Capture Edge Select
This bit selects which edge on the Input Capture pin (ICP0) that is used to trigger a capture event. When the ICES0 bit is written to zero, a falling (negative) edge is used as trigger, and when the ICES0 bit is written to one, a rising (positive) edge will trigger the capture.
When a capture is triggered according to the ICES0 setting, the counter value is copied into the Input Capture Register (ICR0). The event will also set the Input Capture Flag (ICF0), and this can be used to cause an Input Capture Interrupt, if this interrupt is enabled.
When the ICR0 is used as TOP value (see description of the WGM0[3:0] bits located in the TCCR0A and the TCCR0B Register), the ICP0 is disconnected and consequently the Input Capture function is disabled.
Bit 4 – WGM03 Waveform Generation Mode
Bit 3 – WGM02 Waveform Generation Mode
Bits 2:0 – CS0[2:0] Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter. Refer to Figure 17-12 and Figure 17-13.
| CA0[2] | CA0[1] | CS0[0] | Description |
|---|---|---|---|
| 0 | 0 | 0 | No clock source (Timer/Counter stopped). |
| 0 | 0 | 1 | clkI/O/1 (No prescaling) |
| 0 | 1 | 0 | clkI/O/8 (From prescaler) |
| 0 | 1 | 1 | clkI/O/64 (From prescaler) |
| 1 | 0 | 0 | clkI/O/256 (From prescaler) |
| 1 | 0 | 1 | clkI/O/1024 (From prescaler) |
| 1 | 1 | 0 | External clock source on T0 pin. Clock on falling edge. |
| 1 | 1 | 1 | External clock source on T0 pin. Clock on rising edge. |
If external pin modes are used for the Timer/Counter 0, transitions on the T0 pin will clock the counter even if the pin is configured as an output. This feature allows software control of the counting.