31.20.3 PMC System Clock Status Register
Name: | PMC_SCSR |
Offset: | 0x0008 |
Reset: | 0x00000001 |
Property: | Read-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
PCK7 | PCK6 | PCK5 | PCK4 | PCK3 | PCK2 | PCK1 | PCK0 | ||
Access | R | R | R | R | R | R | R | R | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
USBCLK | HCLKS | ||||||||
Access | R | R | |||||||
Reset | 0 | 1 |
Bits 8, 9, 10, 11, 12, 13, 14, 15 – PCK Programmable Clock x Output Status
Value | Description |
---|---|
0 | The corresponding Programmable Clock output is disabled. |
1 | The corresponding Programmable Clock output is enabled. |
Bit 5 – USBCLK USB FS Clock Status
Value | Description |
---|---|
0 | The USB FS clock is disabled. |
1 | The USB FS clock is enabled. |
Bit 0 – HCLKS HCLK Status
Value | Description |
---|---|
0 | HCLK is disabled. |
1 | HCLK is enabled. |