1.4.4 Simulating the Design

For simulation, perform the following the steps:

1. Open Libero® SoC design built through the TCL scripts.
2. To run the simulation, navigate to Stimulus Hierarchy, right-click on the top.v file, and select Set as active stimulus.
3. In the Design Flow tab, double-click Simulate under Verify Pre-Synthesized Design to simulate the design, as shown in the following figure.