5. Module: PWM

Dead time is not applied properly when the PCI active signal is deasserted for a short time of 1-2 PWM clock cycles.

Work around

Ensure the PCI active signal does not have a deassertion period of less than 4 PWM clock cycles.
Use EOC synchronization or Latched modes to control the timing of PCI deassertion.

Affected Silicon Revisions


A1	A2
X	X

DS80001162E

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