4.7.3 CONFIG3

Windowed Watchdog Timer
Name: CONFIG3
Offset: 0x8009

Configuration Word 3

Bit 15141312111098 
   WDTCCS[2:0]WDTCWS[2:0] 
Access R/PR/PR/PR/PR/PR/P 
Reset 111111 
Bit 76543210 
 WDTE[1:0]WDTCPS[4:0] 
Access UR/PR/PR/PR/PR/PR/PR/P 
Reset 11111111 

Bits 13:11 – WDTCCS[2:0] WDT Input Clock Selector bits

ValueDescription
111 Software Control
110 to 011 Reserved
010 32 kHz SOSC
001 WDT reference clock is the 31.25 kHz HFINTOSC (MFINTOSC) output
000 WDT reference clock is the 31.0 kHz LFINTOSC

Bits 10:8 – WDTCWS[2:0] WDT Window Select bits

WDTCWS WDTCON1 [WINDOW] at POR Software Control of WINDOW? Keyed Access Required?
Value Window Delay Percent of Time Window Opening Percent of Time
111 111 n/a 100 Yes No
110 110 n/a 100 No Yes
101 101 25 75
100 100 37.5 62.5
011 011 50 50
010 010 62.5 37.5
001 001 75 25
000 000 87.5 12.5

Bits 6:5 – WDTE[1:0] WDT Operating Mode bits

ValueDescription
11 WDT enabled regardless of Sleep; SEN is ignored
10 WDT enabled while Sleep = 0, suspended when Sleep = 1; SEN is ignored
01 WDT enabled/disabled by the SEN bit
00 WDT disabled; SEN is ignored

Bits 4:0 – WDTCPS[4:0] WDT Period Select bits

WDTCPS WDTCON0[WDTPS] at POR Software Control of WDTPS?
Value Divider Ratio Typical Time-Out

(FIN = 31 kHz)

11111 01011 1:65536 216 2s Yes

11110
...
10011

11110
...
10011

1:32 25 1 ms No
10010 10010 1:8388608 223 256s No
10001 10001 1:4194304 222 128s
10000 10000 1:2097152 221 64s
01111 01111 1:1048576 220 32s
01110 01110 1:524288 219 16s
01101 01101 1:262144 218 8s
01100 01100 1:131072 217 4s
01011 01011 1:65536 216 2s
01010 01010 1:32768 215 1s
01001 01001 1:16384 214 512 ms
01000 01000 1:8192 213 256 ms
00111 00111 1:4096 212 128 ms
00110 00110 1:2048 211 64 ms
00101 00101 1:1024 210 32 ms
00100 00100 1:512 29 16 ms
00011 00011 1:256 28 8 ms
00010 00010 1:128 27 4 ms
00001 00001 1:64 26 2 ms
00000 00000 1:32 25 1 ms