6.4.3 NVMREG Write to EEPROM
- Set the NVMREGS and WREN bits of the NVMCON1 register.
- Write the desired address (address 0x7000) into the NVMADRH:NVMADRL register pair.
- Perform the unlock sequence as described in the 6.4.2 NVM Unlock Sequence section.
A single EEPROM byte is written through NVMDATA register. The operation includes an implicit erase cycle for that byte (it is not necessary to set the FREE bit in NVMCON1 register), and will require multiple instruction cycles to finish. CPU execution continues in parallel and, when complete, WR bit in NVMCON1 register is cleared by hardware, NVMIF flag in PIR7 register is set, and an interrupt will occur if NVMIE in PIE7 is also set. Software must poll the WR bit to determine when writing is complete, or wait for the interrupt to occur. WREN will remain unchanged. Once the EEPROM write operation begins, clearing the WR bit will have no effect; the operation will run to completion.