25.10.3 Channel Event Control Register

Table 25-17. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: CHEVCTRLk
Offset: 0x58 + k*0x50 [k=0..15]
Reset: 0x00000000
Property: PAC Write-Protection, CHCTRLAk.ENABLE =1 write protect

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 EVOEEVSTRIEEVAUXIE EVOMODE[1:0]EVAUXACT[1:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bit 7 – EVOE Channel Event Output Enable

This bit indicates if the Channel event generation is enabled. The event will be generated for every condition defined in the Channel Event Output Mode bits (CHEVCTRLk.EVOMODE).

ValueDescription
0 Channel event generation is enabled
1 Channel event generation is enabled

Bit 6 – EVSTRIE Channel Start Event Input Enable

ValueDescription
0 Channel event start action is disabled.
1 Channel event start action is enabled. See CHCTRLBk.TRIG for details on configuring the channel to use start event as a trigger.

Bit 5 – EVAUXIE Channel Auxiliary Event Enable

ValueDescription
0 Channel event auxiliary action is disabled
1 Channel event auxiliary action is enabled

Bits 3:2 – EVOMODE[1:0] Channel Event Output Mode

This field sets when a output trigger event occurs. Output is always active high.

ValueDescription
11 Ongoing trigger action from the start event trigger to the completion of a cell transfer reads
10 Ongoing trigger action from the start event trigger to the completion of a cell transfer writes
01 Generate 1 clock cycle strobe at the end of a cell transfer
00 Generate 1 clock cycle strobe at the end of a block transfer

Bits 1:0 – EVAUXACT[1:0] Channel Auxiliary Event Input Action

ValueDescription
11 Abort linked list operation and block transfer on the rising edge of the input event
10 Conditional Trigger, active high level event
01 Increment channel priority on the rising edge of the input event
00 Abort block transfer on the rising edge of the input event