16.13.17 Coresight ROM Table Peripheral Identification 4

Table 16-25. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: PID4
Offset: 0x1FD0
Reset: 0x00000000
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 FKBC[3:0]JEPCC[3:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 7:4 – FKBC[3:0] 4KB Count

These bits will always return zero when read, indicating that this debug component occupies one 4KB block.

Bits 3:0 – JEPCC[3:0] JEP-106 Continuation Code

These bits will always return zero when read, indicating a Microchip device.