16.13.5 Configuration

Table 16-13. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: CFG
Offset: 0x0010
Reset: 0x0000000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
      MBFIDCCDMALEVEL1DCCDMALEVEL0 
Access R/WR/WR/W 
Reset 000 

Bit 2 – MBFI Enable Memory BIST Fault Injection

0x0 = MBFI0 and MBFI1 registers are write-protected.

0x1 = MBFI0 and MBFI1 registers can be written. Fault injection is enabled during MBIST operation.

Bits 0, 1 – DCCDMALEVELx DMA Trigger x Level [x=1..0]

ValueNameDescription
0 EMPTY Trigger x rises when DCC is read and falls when it is written.
1 FULL Trigger x rises when DCC is written and falls when it is read.