38.7.9 Timestamp Counter Value

Note:
  1. A write access to TSCV clears the Timestamp Counter value.
  2. A “wrap around” is a change of the Timestamp Counter value from non-zero to zero not caused by the write access to TSCV.
Table 38-26. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: TSCV
Offset: 0x24
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 TSC[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 TSC[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 15:0 – TSC[15:0] Timestamp Counter

The internal Timestamp Counter value is captured on start of frame (both Rx and Tx). When bitfield TSCC.TSS (TSCC<1:0>) = 0x1, the Timestamp Counter is incremented in multiples of CAN bit times [1...16] depending on the configuration of bitfield TSCC.TCP (TSCC<19:16>) . A wrap around sets interrupt flag IR.TSW (IR<16>) .