54.14 Rev B - 02/2015

Description	Moved CoreMark score updated from 2.14 to 2.46 CoreMark/MHz. Two 24-bit TCC and one 16-bit TCC 16 DMA channels PTC supports up to 192 buttons Two 12-bit 1MSPS DAC
Analog Connections of Peripherals	New
Electrical Characteristics	New content
Introduction	New
Low Power Techniques	Removed, refer to PM – Power Manager
RTC – Real-Time Counter	Register Summary - COUNT16 and Register Description - COUNT16: Added Comparator 1 related bits to the EVCTRL, INTENCLR, INTENSET and INTFLAG registers.
EIC – External Interrupt Controller	16 pins/channels Editorial updates
TCC – Timer/Counter for Control Applications	Start Event Action operation note updated No event on pins supported Waveform double buffering not supported No Synchronization Ready interrupt RAMP2C operation added Editorial updates
AC – Analog Comparators, ADC, CCL – Configurable Custom Logic, DAC – Digital-to-Analog Converter, Operational Amplifier Controller (OPAMP), PAC - Peripheral Access Controller, PM – Power Manager, PORT - I/O Pin Controller, PTC - Peripheral Touch Controller, SERCOM – Serial Communication Interface, TC – Timer/Counter	Editorial updates
Schematic Checklist	Updated figures in Power Supply Connections. Maximum ESR recommendation for 32.768kHz crystal removed from External Real Time Oscillator.
Errata	Added new errata: CCL: The reset of the RS latch is not functional. Errata reference 14043 TC: The input capture on IO pins doesn't work. Errata reference 14024 SERCOM: Errata reference 14064

Description