1.8.5 DDR3 Guidelines

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The following are the guidelines for connecting to the DDR3 memory:

DDR3 data nets have dynamic on-die termination (ODT) built into the controller and SDRAM. The configurations are 40 Ω, 60 Ω, and 140 Ω. VTT pull-up is not necessary.
Characteristic impedance: Zo is typically 50 Ω, and Zdiff (differential) is 100 Ω.

DDR3 interfacing with SmartFusion2/IGLOO2 devices for 8-bit and 16-bit interfaces is shown in the following figures.

Figure 1-18. 8-Bit DDR3 Interface

Figure 1-19. 16-Bit DDR3 Interface

Important: Short ECC_TMATCH_ OUT and ECC_TMATCH_ IN when using ECC bits.

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