14.8.37 CSMA_SEED_0
The register CSMA_SEED_0 contains the lower 8-bit of CSMA_SEED.
Name: | CSMA_SEED_0 |
Offset: | 0x2D |
Reset: | 0xEA |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CSMA_SEED_0[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 |
Bits 7:0 – CSMA_SEED_0[7:0] CSMA_SEED_0
Lower 8-bit of CSMA_SEED, bits [7:0]. Used as seed for random number generation in the CSMA-CA algorithm.
Value | Description |
---|---|
0xEA |
This register contains the lower 8-bit of the CSMA_SEED, bits [7:0]. The higher 3-bit are part of register bits CSMA_SEED_1 (register 0x2E, CSMA_SEED_1). CSMA_SEED is the seed for the random number generation that determines the length of the backoff period in the CSMA-CA algorithm. |
- It is recommended to initialize register bits CSMA_SEED_0 and CSMA_SEED_1 with random values. This can be done using register bits RND_VALUE (register 0x06, PHY_RSSI).
- The content of register bits CSMA_SEED_0 and CSMA_SEED_1 initializes the TX_ARET random backoff generator after wakeup from DEEP_SLEEP state. It is recommended to re-initialize both registers after every DEEP_SLEEP state with a random value.